1. Field of the Invention
The present invention relates to non-volatile semiconductor memory devices and, in more particular, to an erasable programmable read-only memory with a large data storage capacity.
2. Description of the Related Art
With the increasing needs for high performance and reliability of digital computer systems, development of semiconductor memories with large capacity have been demanded strongly, which can replace existing nonvolatile data storage devices for digital computer systems, such as a magnetic floppy diskette drive unit, a fixed disk unit, or the like. A presently-available erasable programmable read-only memory has technical advantages such as higher reliability and a higher data write/read rate than those of the magnetic data storage devices; however, the data storage capability of the memory of this type is not so large as to replace the magnetic data storage devices.
In a conventional electrically erasable programmable read-only memory (to be referred to as "EEPROM" hereinafter), since each memory cell is typically arranged to include two transistors, it cannot be expected to provide a high integration density that can provide a large capacity capable of replacing the aforementioned peripheral data storage devices.
Recently, an EEPROM with "NAND cell" structure has been developed as a non-volatile semiconductor memory which is highly integrated and therefore has a large data storage capacity. According to such memory of this type, each of memory cells typically consists of only one transistor having a floating gate and a control gate. Only one contact portion is formed between an array of memory cells, which are arranged on a substrate to constitute the "NAND cell" structure, and the corresponding bit line associated therewith. A cell area on substrate surface can thus be reduced much smaller than that of a conventional EEPROM, thereby improving the integration density of the EEPROM.
The NAND type EEPROM, however, suffers from the generation of current leakage due to the "inversion phenomenon" beneath a field isolation region between adjacent NAND cell blocks of neighboring bit lines. Such current leakage causes programming errors, such as writing data in an erroneous memory cell other than a selected memory cell, writing erroneous data in the selected memory cell, so that the operational reliability will be degraded.